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Page
Item
844, 845
23.3.1 Connecting a Crystal Resonator
845, 846
848
23.3.2 External Clock Input
849
23.4 PLL Circuit
854
24.1 Overview
860, 861
24.2.2 System Clock Control Register (SCKCR) Description amended
871
24.6.3 Setting Oscillation Stabilization Time after
Clearing Software Standby Mode
25.2 Power supply voltage and operating
frequency range
880 to
25.2 DC Characteristics
887
888
25.3 AC Characteristics
889
25.3.1 Clock Timing
893, 894,
25.3.3 Bus Timing
901
902
25.3.4 DMAC Timing
Revisions
(See Manual for Details)
Table 23-2 Damping Resistance
Value
25 MHz added
Crystal Resonator amended
Table 23-3 Crystal Resonator
Parameters
25 MHz added
Figure 23-5 Points for Attention
when Using PLL Oscillation Circuit
amended
External Clock
Description amended
Table 23-4 External Clock Input
Conditions amended
Amended
Table 24-1 LSI Internal States in
Each Mode
WDT module stop mode description
amended
Table 24-5 Oscillation Stabilization
Time Settings
25 MHz added
Deleted
Following item numbers amended
Amended
Figure 25-1 Output Load Circuit
amended
Table 25-5 Clock Timing amended
Table 25-7 Bus Timing amended
Figure 25-15 External Bus Request
Output Timing added
Table 25-8 DMAC Timing amended
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