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Table 5-4
Interrupt Sources, Vector Addresses, and Interrupt Priorities
Interrupt Source
NMI
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
SWDTEND (software activation
interrupt end)
WOVI0 (interval timer)
CMI
PC break
ADI (A/D conversion end)
WOVI1 (interval timer)
Reserved
TGI0A (TGR0A input
capture/compare match)
TGI0B (TGR0B input
capture/compare match)
TGI0C (TGR0C input
capture/compare match)
TGI0D (TGR0D input
capture/compare match)
TCI0V (overflow 0)
Reserved
Origin of
Interrupt
Vector
Source
Number
External
7
pin
16
17
18
19
20
21
22
23
DTC
24
Watchdog
25
timer 0
Refresh
26
timer
PC break
27
A/D
28
Watchdog
29
timer 1
—
30
31
TPU
32
channel 0
33
34
35
36
—
37
38
39
Vector
Address*
Advanced
Mode
IPR
H'001C
H'0040
IPRA6 to 4
H'0044
IPRA2 to 0
H'0048
IPRB6 to 4
H'004C
H'0050
IPRB2 to 0
H'0054
H'0058
IPRC6 to 4
H'005C
H'0060
IPRC2 to 0
H'0064
IPRD6 to 4
H'0068
IPRD2 to 0
H'006C
IPRE6 to 4
H'0070
IPRE2 to 0
H'0074
H'0078
H'007C
H'0080
IPRF6 to 4
H'0084
H'0088
H'008C
H'0090
H'0094
H'0098
H'009C
Priority
High
Low
101
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