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IRQ
interrupt
Interrupt source
On-chip
clear signal
supporting
module
5.6.3
Operation
The interrupt controller has three main functions in DTC and DMAC control.
(1) Selection of Interrupt Source: DMAC inputs activation factor directly to each channel. The
activation factors for each channel of DMAC are selected by DTF3 to DTF0 bits of DMACR. The
DTA bit of DMABCR can be used to select whether the selected activation factors are managed
by DMAC. By setting the DTA bit to 1, the interrupt factor which were the activation factor for
that DMAC do not act as the DTC activation factor or the CPU interrupt factor.
Interrupt factors other than the interrupts managed by the DMAC are selected as DTC activation
request or CPU interrupt request by the DTCERA to DTCERF of DTC and the DTCE bit of
DTCERI.
By specifying the DISEL bit of the DTC's MRB, it is possible to clear the DTCE bit to 0 after
DTC data transfer, and request a CPU interrupt.
If DTC carries out the designate number of data transfers and the transfer counter reads 0, after
DTC data transfer, the DTCE bit is also cleared to 0, and a CPU interrupt requested.
Interrupt
request
Selection
circuit
Select
signal
DTCER
DTVECR
Interrupt controller
Figure 5-9 Interrupt Control for DTC and DMAC
DMAC
Control logic
Clear signal
SWDTE
clear signal
Determination of
priority
DTC activation
request vector
number
DTC
Clear signal
CPU interrupt
request vector
number
CPU
I, I2 to I0
117
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