Hitachi H8S/2633 Hardware Manual page 195

ø
Address bus
CSn
AS
RD
D15 to D8
Read
D7 to D0
HWR
LWR
Write
D15 to D8
D7 to D0
Note: n = 0 to 7
Figure 7-13 Bus Timing for 16-Bit 3-State Access Space (3) (Word Access)
Bus cycle
T T
1 2
Valid
Valid
T
3
Valid
Valid
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