Download Print this page

Hitachi H8S/2633 Hardware Manual page 1046

Advertisement

DTVECR—DTC Vector Register
Bit
:
SWDTE
Initial value
:
R/W
:
R/(W)*
Notes: 1.
Only 1 can be written to the SWDTE bit.
2.
DTVEC6 to DTVEC0 can be written to when SWDTE=0.
1034
7
6
DTVEC6
DTVEC5
0
0
R/(W)*
R/(W)*
1
2
DTC software startup enable
0
0
DTC software startup disabled
[Clearing]
• When DISEL=0 and the specified number of transmissions
has not completed.
• When 0 is written after a software startup data transmit end
interrupt (SWDTEND) request is sent to the CPU.
1
DTC software startup enabled
[Retention]
• When DISEL=1 and data transmission ends;
• On completion of the specified number of transmissions;
• During data transmission by software startup.
H'FE1F
5
4
DTVEC4
DTVEC3
0
0
R/(W)*
R/(W)*
2
2
DTC software startup vector 6 to 0
3
2
DTVEC2
DTVEC1
0
0
R/(W)*
R/(W)*
2
2
DTC
1
0
DTVEC0
0
0
R/(W)*
2
2

Advertisement

loading

This manual is also suitable for:

Hd6432633Hd6432631Hd64f2633H8s/2632Hd6432632H8s/2631