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2. Setting of DC-DC Converter for VT
(1)
Example of using the DDCK1 internal doubler transistor
The DDCK1 pin includes an N-ch transistor for the DC-DC converter, and it can drive the coil directly. This
transistor can withstand 6 V and no voltage over this level is permitted. Usually, the doubler clamp function is used to
keep the limit the voltage. Set the POL bit to "0" when the DDCK1 pin is used.
Shown below is an example of a DC-DC converter circuit using the DDCK1 pin.
The clock output of the DDCK1 pin supplies coil-induced pulses through the diode to increase the voltage. The
increased voltage is then supplied to the low-pass filter as the doubled voltage for VT.
In the following example, pin P8-2, composed of pins 60, controls the turning the divided resistance on/off. When
the doubler is on, the program outputs the I/O port "L" level to turn the resistance division on. When the doubler is
off, the output is set to "HZ" (input setting) to disconnect the resistance division. Alternately, you can use the GND
rather than the 60-pin connection. However, when the GND connection is used, the current from the V
supply is always consumed through the coil and the divided resistance in the doubler off state. This way, this control
function prevents the current from being consumed in the doubler system circuit when the doubler is off. Note that
this control is unnecessary and the GND connection may be used instead, when the power supply used turns off in the
tuner off state or when it doesn't matter if the consumption current is increased in the system.
DC-DC converter voltage for VT
Power
supply
（V
)
DD
+
Note:
Use the low-VF shot key diode for the diode shown above.
Recommended diode: 1SS357
Note:
Determine the doubler coil constant depending on the DC-DC converter clock frequency and
the doubler current capacity.
Connect as required, when the output resistance 100 Ω of the DDCK1 pin shown above or the
Note:
clock output affects the tuner characteristics.
Note:
It doesn't matter if a zener diode of 5.5 V or below is used as a substitute for the clamp circuit
(VDET). Using the zener diode eliminates the need to use the VDET and doubler on/off control
pins.
Note:
When the clamp circuit is used, operation is stopped if the doubled voltatge exceeds the
specified level. If the doubled voltage is supplied exceeding the specified voltage while the
voltage of DC-DC converter for VT is supplied, the doubler function operates intermittently and
may affect the tuner characteristics. To prevent this, it is recommended that doubler and
low-pass filter load capacities that will not exceed the detection voltage be determined during
tuner operation.
Note:
The N-ch transistor buffer gate signal for the DDCK1 pin uses the V
This allows stable doubler operation, even if the V
Note:
When this product is used as shown above, design the tuner circuit to widen the variable range
of the tuning voltage (VT).
Note:
The filter circuit constants shown above are for reference only. Examine and design the actual
circuits according to your desired characteristics.
～
Note
VDET
58
100uH
100Ω
59
DDCK1
Note
60
220kΩ
39kΩ
P8-2(ON:"L"output, OFF:HZ)
～
Example of internal DC-DC transistor doubler circuit
111
V
DB
0.75V
+
-
V
LCD
DC-DC converter clock for VT
power supply is reduced.
DD
TC9349AFG
power
DD
(3 V) power supply.
LCD
2006-02-24
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