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Start and stoppage of serial operation
TSTA1 and TATA2 bits (Start of serial operation)
The TSTA1 bit controls the start of serial operation in the master mode. When this bit is set to "1", the serial clock
will be outputted and the serial interface operation will start.
When start is executed in the 3-wire mode, the serial counter start data (STA0 to 3) will be preset in the serial
input/output counters, and serial output data corresponding to the start data will be outputted. After that, serial data
(SO0 to SO9, SOE, SOF) will be outputted sequentially according to the serial clock (SCK).
When start is executed in the 2-wire mode, the start condition pulse will be outputted to the serial data output.
When this start condition is satisfied, the serial operation will be started. When start is executed in the UART mode,
the start pulse will be outputted from the TX pin, and then the same operation as in the 3-wire mode will be executed.
In slave mode, operation can be started by the external serial clock without the need to use this control bit.
The TSTA2 bit controls the restart of serial operation in the 2-wire master mode. When start is executed by the
TSTA1 bit, the start condition will be outputted, the 8-bit serial clock will be active and the operation will enter the
serial wait state. When the TSAT2 bit is set to "1", the serial operation will be restarted for serial input/output.
Start of serial operation in the master mode (TSTA1 bit)
→ When this bit is set to "1" in the master mode, serial operation will start.
When in 2-wire mode, the start condition will be outputted automatically.
When in UART mode, the start pulse will be outputted.
Execution of restart in the 2-wire mode (TSTA2 bit)
→ When this bit is set to "1", the operation will be restarted.
Note:
When these bits are set to "0", the system will be in a "don't care" state.
Note:
Allow the wait time that corresonds to at least one cycle of the serial operation clock between
execution of stop (STP = "1") and execution of start (TSTA = "1").
STP bit (Stoppage of serial operation)
The STP bit controls the compulsive stoppage of serial operation, the initialization of internal state and the output
of the stop condition.
When the STP bit is set to "1" (stop is executed), the serial counter stop data (STP0 to 3) is preset to the serial
counter and initializes the internal state. When a stop is executed during serial operation in master mode, the serial
clock operation will be stopped.
When a stop is executed in the master 2-wire mode, the stop condition will be automatically outputted from the
serial data output and the serial clock in addition to the operation as mentioned above.
Stoppage and initialization of serial operation in the master mode (STP bit)
→ When this bit is set to "1", the operation will be stopped and initialized. In the 2-wire mode, the stop
condition will be outputted automatically.
Note:
When this bit is set to "0", the system will be in a "don't care" state.
After setting the condition, be sure to execute stoppage (STP = "1") for internal initialization.
Note:
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TC9349AFG
2006-02-24
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