Toshiba TC9349AFG Manual page 18

14. Instruction Function and Operation Table
(Description of the symbols used in the table)
M
M*
r
PC
ASP
ASR
ISP
ISR
G
DATA
I
I*
N
−
C
CN
RN General register number (4 bits)
ADDR1
ADDR2 Upper 6 bits of program memory address within page 0
AR
Ca
CY
P
b
IN1~IN3
OUT1 ~ OUT3
( )
[ ] C
[ ]
[ ] P
IC
*
DC Data memory column address (4 bits)
DR
DR*
(M) b0 ~ (M) b3
Data memory address
Normally, an address within 000H to 03FH in the data memory.
Data memory address (256 words)
An address within 000H to 0FFH in the data memory.
(Effective only during execution of the ST or LD instruction)
General register
An address within 000H to 00FH in the data memory.
Program counter (14 bits)
Address stack pointer (14 bits)
Address stack register (14 bits)
Interrupt stack pointer (2 bits)
Interrupt stack register (26 bits)
G-register (5 bits)
Data register (16 bits)
Immediate data (4 bits)
Immediate data (6 bits, effective only during execution of the STIG instruction)
Bit position (4 bits)
All "0"
Port code number (4 bits)
Port code number (4 bits)
Program memory address (13 bits)
DAL address register (14 bit)
Carry
Carry flag
Wait condition
Borrow
Ports used during execution of the IN1 to IN3 instructions
Ports used during execution of the OUT1 to OUT3 instructions
Contents of registers or data memory
Contents of the port indicated by the code number C (4 bits)
Contents of data memory indicated by the register or data memory
Contents of program memory (16 bits)
Instruction code (6 bits)
Command with skip function
Data memory row address (2 bits)
Data memory row address
(4 bits, effective only during execution of the ST or LD instruction)
Bit data of data memory contents (1 bit)
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TC9349AFG
2006-02-24