Toshiba TC9349AFG Manual page 127

Cmos digital integrated circuit silicon monolithic
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DC-DC Converter Voltage Doubler for VT
Characteristics
Doubled voltage range
Doubled voltage detection setting
error
Detection operating current (Note 6)
"H" level output current
"L" level output current
Output off leak current
Note 6:
This value increases when the tdoubled voltage detection circuit is used.
Transistor for Low-pass Filter
Characteristics
"L" level output current
Output off leak current
Input leak current
Reset Signal Input
( RESET )
Characteristics
Input leak current
"H" level
Input voltage
"L" level
Reduced Voltage Detection Circuit
Characteristics
Reduced voltage detection setting
error
Reduced voltage detection operating
current
Note 7:
This value increases when the detection circuit is used.
Test
Symbol
Circuit
V
OUT
∆ V
DET
I
DET
I
OH1
I
OL1
I
OL2
I
OFF
(Tout, Tin)
Test
Symbol
Circuit
I
OL3
I
OFF
I
LI
Test
Symbol
Circuit
I
LI
V
IH
V
IL
Test
Symbol
Circuit
∆ V
BL
I
LI
(Note 7)
127
(VDET, DDCK1, DDCK2)
Test Condition
) V EE = 1.5 V
(V
DET
(V
)
DET
= 0.2 V
(DDCK2) V
OL
when DDCK2 is selected
= 0.2 V,
(DDCK2) V
OL
when DDCK1 is selected
= 0.2 V,
(DDCK1) V
OL
when DDCK1 is selected
= 5.5 V,
(DDCK1) V
IH
when DDCK1 is selected
Test Condition
= 0.2 V, Tin = 1.5 V
(Tout) V
OL
= 5.5 V, Tin = 0 V
(Tout) V
OH
= V
= 3.6 V
(Tin) V
OB
IH
= 0 V
V
IL
Test Condition
= V
= 0 V
V
, V
IH
CPU
IL
Test Condition
= 1.5 V
(V
) V
DD
EE
TC9349AFG
Min
Typ.
Max
Unit
0
~
5.5
V
± 0.05
V
µ A
10
− 0.4
− 0.8
0.4
0.8
mA
2
4
± 1.0
µ A
Min
Typ.
Max
Unit
20
mA
± 1.0
µ A
± 1.0
µ A
Min
Typ.
Max
Unit
± 1.0
µ A
V
CPU
~
V
× 0.8
CPU
V
V
CPU
0
~
× 0.2
Min
Typ.
Max
Unit
± 0.03
V
µ A
20
2006-02-24

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