2.
Control Ports of Input and Output Ports
Y1
Y2
Y4
Y8
SEL1
SEL2 SEL4 SEL8
φL12( Data port 1)
Data select
Y2
Y1
-0
-1
(0)
I/O port 9 output data
-0
-1
(1)
I/O port 10 output data
-0
-1
(2)
I/O port 11 output data
-0
-1
(3)
I/O port 12 output data
-0
-1
(4)
I/O port 13 output data
-0
-1
(5)
I/O port 14 output data
-0
-1
(6)
I/O port 15 output data
(7)
*
-1
(8)
I/O port 9 control
-0
-1
(9)
I/O port 10 control
-0
-1
(A)
I/O port 11 control
-0
-1
(B)
I/O port 12 control
-0
-1
(C)
I/O port 13 control
-0
-1
(D)
I/O port 14 control
-0
-1
(E)
I/O port 15 control
(F)
I/O port output data
●CMOS type I/O port
0 : Output pin "L" level
1 : Output pin "H" level
●Nch open drain type I/O port
0 : Output pin "L" level
1 : Output pin High impedance
φL24
φL25
Y4
Y8
Y1
-2
*
φL30
-2
-3
φL31
-2
-3
-0
φL32
I/O port 3 output data
-2
-3
-0
φL33
I/O port 4 output data
-2
-3
-0
φL34
I/O port 5 output data
-2
-3
-0
φL35
I/O port 6 output data
*
*
φL36
-0
φL37
I/O port 8 output data
-2
*
φL38
-2
-3
φL39
-2
-3
-0
φL3A
-2
-3
-0
φL3B
-2
-3
-0
φL3C
-2
-3
-0
φL3D
*
*
φL3E
-0
φL3F
I/O port 16 output data
I/O control data
( Setting of input and output)
0 : Setting of I/O port input
1: Setting of I/O port output
DO1 control
Y1
Y2
Y4
Y8
M0
M1
DO2 control1
Y1
Y2
Y4
Y8
M0
M1
63
OUT3 instruction
Y2
Y4
Y8
φK30
φK31
-1
-2
-3
φK32
-1
-2
-3
φK33
-1
-2
-3
φK34
-1
-2
-3
φK35
φK36
-1
-2
-3
φK37
φK38
φK39
-1
-2
-3
φK3A
I/Ocontrol3
-1
-2
-3
φK3B
I/O port 4 control
-1
-2
-3
φK3C
I/O port 5 control
-1
-2
-3
φK3D
I/O port 16 control
φK3E
-1
-2
-3
φK3F
φK25
Setting of DO1 / DO2 output status
M1
M0
0
0
0
1
1
0
1
1
TC9349AFG
IN3 instruction
Y1
Y2
Y4
Y8
-0
-1
-2
-3
I/O port 3 input data
-0
-1
-2
-3
I/O port 4 input data
-0
-1
-2
-3
I/O port 5 input data
-0
-1
-2
-3
I/O port 6 input data
-0
-1
-2
-3
I/O port 8 input data
-0
-1
-2
IN
I/O port 9 input
data
-0
-1
-2
-3
I/O port 10 input data
-0
-1
-2
-3
I/O port 12 input data
-0
-1
-2
-3
I/O port 13 input data
-0
-1
-2
-3
I/O port 14 input data
-0
-1
0
0
I/O port 15
input data
-0
-1
-2
-3
I/O port 16 input data
Y1
Y2
Y4
Y8
(Un-
(Un-
(Un-
IN2
known)
known)
known)
I/O port input data
0 : Input pin "L" level
1 : Input pin "H" level
Output status
Phase comparator output
"L" level output
OT output
"H" level output
High impedance
2006-02-24