Format Of Prescaler Mode Register 00 (Prm00) - NEC 78K0 User Manual

Address: FFBBH After reset: 00H
Symbol 7
PRM00 ES101
ES101
0
0
1
1
ES001
0
0
1
1
PRM001
0
0
1
1
Note The external clock requires a pulse two cycles longer than internal clock (f
Cautions 1. When the Ring-OSC clock is selected as the clock to be supplied to the CPU, the clock of the
Ring-OSC oscillator is divided and supplied as the count clock. If the count clock is the
Ring-OSC clock, the operation of 16-bit timer/event counter 00 is not guaranteed. When an
external clock is used and when the Ring-OSC clock is selected and supplied to the CPU, the
operation of 16-bit timer/event counter 00 is not guaranteed, either, because the Ring-OSC
clock is supplied as the sampling clock to eliminate noise.
2. Always set data to PRM00 after stopping the timer operation.
3. If the valid edge of TI000 is to be set for the count clock, do not set the clear & start mode
using the valid edge of TI000 and the capture trigger.
4. If the TI000 or TI010 pin is high level immediately after system reset, the rising edge is
immediately detected after the rising edge or both the rising and falling edges are set as the
valid edge(s) of the TI000 pin or TI010 pin to enable the operation of 16-bit timer counter 00
(TM00). Care is therefore required when pulling up the TI000 or TI010 pin. However, when re-
enabling operation after the operation has been stopped once, the rising edge is not
detected.
5. When P01 is used as the TI010 valid edge, it cannot be used as the timer output (TO00), and
when used as TO00, it cannot be used as the TI010 valid edge.
Remarks 1. f : X1 input clock oscillation frequency
X
2. TI000, TI010: 16-bit timer/event counter 00 input pin
3. Figures in parentheses are for operation with f
182
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Figure 7-12. Format of Prescaler Mode Register 00 (PRM00)
R/W
6 5
ES100 ES001
ES100
0 Falling edge
1 Rising edge
0 Setting prohibited
1 Both falling and rising edges
ES000
0 Falling edge
1 Rising edge
0 Setting prohibited
1 Both falling and rising edges
PRM000
0 f (10 MHz)
X
2
1 f /2 (2.5 MHz)
X
8
0 f /2 (39.06 kHz)
X
1 TI000 valid edge
User's Manual U15947EJ2V0UD
4 3 2
ES000 0 0
TI010 valid edge selection
TI000 valid edge selection
Count clock selection
*
Note
= 10 MHz.
X
1 0
PRM001 PRM000
).
X