Configuration Diagram Of Ppg Output; Ppg Output Operation Timing - NEC 78K0 User Manual

Note
f (f )
X X
2 4 Note
f /2 (f /2 )
X X
8 6 Note
f /2 (f /2 )
X X
TI000/P00 Noise
Note
eliminator
(TI001/P05)
f
X
Note Frequencies and pin names without parentheses are for 16-bit timer/event counter 00, and those in
parentheses are for 16-bit timer/event counter 01.
Count clock
TM0n count value
CR00n capture value
CR01n capture value
Cautions 1. CR00n cannot be rewritten during TM0n operation.
2. In the PPG output operation, change the pulse width (rewrite CR01n) during TM0n operation
using the following procedure.
<1> Disable the timer output inversion operation by match of TM0n and CR01n (TOC0n4 = 0)
<2> Disable the INTTM01n interrupt (TMMK01n = 1)
<3> Rewrite CR01n
<4> Wait for 1 cycle of the TM0n count clock
<5> Enable the timer output inversion operation by match of TM0n and CR01n (TOC0n4 = 1)
<6> Clear the interrupt request flag of INTTM01n (TMIF01n = 0)
<7> Enable the INTTM01n interrupt (TMMK01n = 0)
Remarks 1. 0000H ≤ M < N ≤ FFFFH
µ
2. n = 0: PD780143, 780144, n = 0, 1:
190
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Figure 7-19. Configuration Diagram of PPG Output
16-bit timer capture/compare
register 00n (CR00n)
16-bit timer counter 0n
(TM0n)
16-bit timer capture/compare
register 01n (CR01n)
Figure 7-20. PPG Output Operation Timing
t
0000H 0001H
N
Clear
TO0n
Pulse width: (M + 1) × t
1 cycle: (N + 1) × t
µ
User's Manual U15947EJ2V0UD
Clear
circuit
*
M − 1
N − 1
M
N
Clear
N
M
PD780146, 780148, 78F0148
TO00/TI010/P01
( TO01/TI011/P06 )
0000H 0001H