CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Figure 7-32. Configuration Diagram of External Event Counter
f
X
Valid edge of TI00n
Note OVF0n is set to 1 only when CR00n is set to FFFFH.
Figure 7-33. External Event Counter Operation Timing (with Rising Edge Specified)
TI00n pin input
TM0n count value
0000H 0001H 0002H 0003H 0004H 0005H
CR00n
INTTM00n
Caution When reading the external event counter count value, TM0n should be read.
µ
Remark n = 0:
PD780143, 780144
µ
n = 0, 1:
PD780146, 780148, 78F0148
16-bit timer capture/compare
register 00n (CR00n)
Noise eliminator
16-bit timer counter 0n (TM0n)
N
*
User's Manual U15947EJ2V0UD
Internal bus
Match
Clear
N − 1
N
0000H 0001H 0002H 0003H
INTTM00n
Note
OVF0n
201