Format Of Low-Voltage Detection Register (Lvim) - NEC 78K0 User Manual

Figure 25-2. Format of Low-Voltage Detection Register (LVIM)
Address: FFBEH After reset: 00H
<7>
Symbol
LVION
LVIM
Notes 2, 3
LVION
0 Disables operation
1 Enables operation
Notes 2, 4, 5
LVIE
0 Disables operation
1 Enables operation
Note 2
LVIMD
0 Generates interrupt signal when supply voltage (V
1 Generates internal reset signal when supply voltage (V
Note 6
LVIF
0 Supply voltage (V
1 Supply voltage (V
Notes 1. Bit 0 is read-only.
2. LVION, LVIE, and LVIMD are cleared to 0 in the case of a reset other than an LVI reset.
These are not cleared to 0 in the case of an LVI reset.
3. When LVION is set to 1, operation of the comparator in the LVI circuit is started. Use
software to instigate a wait of at least 0.2 ms from when LVION is set to 1 until the voltage is
confirmed at LVIF.
4. If "POC cannot be used" is selected by a mask option, wait for 2 ms or more by software from
when LVIE is set to 1 until LVION is set to 1.
5. If "POC used" is selected by a mask option, setting of LVIE is invalid because the reference
voltage generator in the LVI circuit always operates.
6. The value of LVIF is output as the interrupt request signal INTLVI when LVION = 1 and
LVIMD = 0.
Caution To stop LVI, follow either of the procedures below.
• When using 8-bit memory manipulation instruction: Write 00H to LVIM.
• When using 1-bit memory manipulation instruction: Clear LVION to 0 first and then
482
CHAPTER 25 LOW-VOLTAGE DETECTOR
Note 1
R/W
6 5 <4>
0 0 LVIE
Enables low-voltage detection operation
Specifies reference voltage generator
Low-voltage detection operation mode selection
Low-voltage detection flag
) > detection voltage (V
DD
) < detection voltage (V
DD
User's Manual U15947EJ2V0UD
3 2 <1>
0 0 LVIMD
) < detection voltage (V
DD
) < detection voltage (V
DD
), or when operation is disabled
LVI
)
LVI
*
clear LVIE to 0.
<0>
LVIF
)
LVI
)
LVI