Format Of Divisor Selection Register 0 (Brgca0); Format Of Automatic Data Transfer Address Point Specification Register 0 (Adtp0) - NEC 78K0 User Manual

(4) Divisor selection register 0 (BRGCA0)
This is an 8-bit register used to select the serial clock.
This register can be set by an 8-bit memory manipulation instruction. However, when bit 0 (TSF0) of serial
status register 0 (CSIS0) is 1, rewriting BRGCA0 is prohibited.
Figure 17-6. Format of Divisor Selection Register 0 (BRGCA0)
Address: FF93H After reset: 03H
Symbol 7
BRGCA0
0
BRGCA01
0
0
1
1
Remarks 1. Figures in parentheses apply to operation with f
2. f : X1 input clock oscillation frequency
X
(5) Automatic data transfer address point specification register 0 (ADTP0)
This is an 8-bit register used to specify the buffer RAM address that ends transfer during automatic data
transfer (bit 6 (ATE0) of serial operation mode specification register 0 = 1).
This register can be set by an 8-bit memory manipulation instruction. However, when bit 0 (TSF0) of serial
status register 0 (CSIS0) is 1, rewriting ADTP0 is prohibited.
In the 78K0/KF1, 00H to 1FH can be specified because 32 bytes of buffer RAM are incorporated.
Example When ADTP0 is set to 07H
8 bytes of FA00H to FA07H are transferred.
In repeat transfer mode (bit 5 (ATM0) of CSIMA0 = 1), transfer is performed repeatedly up to the address
specified with ADTP0.
Example When ADTP0 is set to 07H (repeat transfer mode)
Transfer is repeated as FA00H to FA07H, FA00H to FA07H, ... .
Figure 17-7. Format of Automatic Data Transfer Address Point Specification Register 0 (ADTP0)
Address: FF94H After reset: 00H
Symbol 7
ADTP0
0
Caution Be sure to clear bits 7 to 5 to 0.
386
CHAPTER 17 SERIAL INTERFACE CSIA0
R/W
6 5
0 0
BRGCA00
0 f /6 (1.67 MHz)
X
3
1 f /2 (1.25 MHz)
X
4
0
f /2 (625 kHz)
X
5
1 f /2 (312.5 kHz)
X
R/W
6 5
0 0 ADTP04
User's Manual U15947EJ2V0UD
4 3 2
0 0 0
CSIA0 serial clock selection
= 10 MHz
X
*
4 3 2
ADTP03 ADTP02
1 0
BRGCA01 BRGCA00
1 0
ADTP01 ADTP00