Interrupt
Default
Note 1
Type
Priority
Maskable
20
INTKR
21
INTWT
22
INTP6
23
INTP7
24
INTDMU
25
INTCSI11
26
INTTM001
27
INTTM011
28
INTACSI
−
Software
BRK
−
Reset
RESET
POC
LVI
Clock monitor X1 oscillation stop detection
WDT
Notes 1.
The default priority is the priority applicable when two or more maskable interrupts are generated
simultaneously. 0 is the highest priority, and 28 is the lowest.
2.
Basic configuration types (A) to (D) correspond to (A) to (D) in Figure 19-1.
3.
The interrupt sources INTCSI11, INTTM001, and INTTM011 are available only in the
780148, and 78F0148.
4.
When "POC used" is selected by a mask option.
5.
When bit 1 (LVIMD) of the low-voltage detection register (LVIM) is set to 1.
430
CHAPTER 19 INTERRUPT FUNCTIONS
Table 19-1. Interrupt Source List (2/2)
Interrupt Source
Name
Key interrupt detection
Watch timer overflow
Pin input edge detection
End of multiply/divide operation
Note 3
End of CSI11 communication
Note 3
Match between TM01 and CR001 (when
compare register is specified), TI011 pin valid
edge detection (when capture register is
specified)
Note 3
Match between TM01 and CR011 (when
compare register is specified), TI001 pin valid
edge detection (when capture register is
specified)
End of CSIA0 communication
BRK instruction execution
Reset input
Note 4
Power-on-clear
Low-voltage detection
WDT overflow
User's Manual U15947EJ2V0UD
Internal/
External
Trigger
External
Internal
External
Internal
Note 5
*
Vector
Basic
Table
Configuration
Note 2
Address
Type
002CH
(C)
002EH
(A)
0030H
(B)
0032H
0034H
(A)
0036H
0038H
003AH
003CH
−
003EH
(D)
−
−
0000H
µ
PD780146,