Automatic Transmission/Reception Suspension And Restart - NEC 78K0 User Manual

8-bit single-chip microcontrollers
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(e) Automatic transmission/reception suspension and restart
Automatic transmission/reception can be temporarily suspended by setting bit 1 (ATSTP0) of serial
trigger register 0 (CSIT0) to 1.
During 8-bit data communication, the transmission/reception is not suspended. It is suspended upon
completion of 8-bit data communication.
When suspended, bit 0 (TSF0) of serial status register 0 (CSIS0) is cleared to 0 after transfer of the 8th
bit.
Cautions 1. If the HALT instruction is executed during automatic transmission/reception,
2. When suspending automatic transmission/reception, do not change the operating
Figure 17-23. Automatic Transmission/Reception Suspension and Restart
ATSTP0 = 1 (Suspend command)
SCKA0
SOA0
D7 D6 D5 D4 D3 D2 D1 D0
SIA0
D7 D6 D5 D4 D3 D2 D1 D0
ATSTP0: Bit 1 of serial trigger register 0 (CSIT0)
ATSTA0: Bit 0 of CSIT0
412
CHAPTER 17 SERIAL INTERFACE CSIA0
communication is suspended and the HALT mode is set if during 8-bit data
communication. When the HALT mode is cleared, automatic transmission/reception
is restarted from the suspended point.
mode to 3-wire serial I/O mode while TSF0 = 1.
User's Manual U15947EJ2V0UD
Suspend
Restart command
ATSTA0 = 1
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
*

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