Configuration Of Watchdog Timer; Block Diagram Of Watchdog Timer - NEC 78K0 User Manual

8-bit single-chip microcontrollers
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11.2 Configuration of Watchdog Timer

The watchdog timer consists of the following hardware.
Control registers
2
Clock
f
/2
R
input
4
f
/2
XP
controller
Watchdog timer enable
register (WDTE)
264
CHAPTER 11 WATCHDOG TIMER
Table 11-3. Configuration of Watchdog Timer
Item
Watchdog timer mode register (WDTM)
Watchdog timer enable register (WDTE)
Figure 11-1. Block Diagram of Watchdog Timer
11
f
/2
to
R
18
f
/2
R
16-bit
counter
or
13
f
/2
to
XP
20
f
/2
XP
2
Clear
0
1
1
WDCS4
Watchdog timer mode
register (WDTM)
Internal bus
User's Manual U15947EJ2V0UD
Configuration
Output
Selector
controller
3
3
WDCS3
WDCS2
WDCS1 WDCS0
*
Internal reset signal
Mask option
(to set "Ring-OSC
cannot be stopped" or
"Ring-OSC can be
stopped by software")

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