Format Of Serial Clock Selection Register 11 (Csic11) - NEC 78K0 User Manual

8-bit single-chip microcontrollers
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Figure 16-6. Format of Serial Clock Selection Register 11 (CSIC11)
Address: FF89H After reset: 00H R/W
Symbol
7
CSIC11
0
CKP11
0
0
1
1
CKS112
0
0
0
0
1
1
1
1
Cautions 1. When the Ring-OSC clock is selected as the clock supplied to the CPU, the clock of the Ring-
OSC oscillator is divided and supplied as the serial clock. At this time, the operation of serial
interface CSI11 is not guaranteed.
2. Do not write to CSIC11 while CSIE11 = 1 (operation enabled).
3. Clear CKP11 to 0 to use P02/SO11, P03/SI11, and P04/SCK11 as general-purpose port pins.
4. The phase type of the data clock is type 1 after reset.
Remarks 1. Figures in parentheses are for operation with fx = 10 MHz
2. f
: X1 input clock oscillation frequency
X
CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
6
5
0
0
CKP11
DAP11
Specification of data transmission/reception timing
0
SCK11
SO11
SI11 input timing
1
SCK11
SO11
SI11 input timing
0
SCK11
SO11
SI11 input timing
1
SCK11
SO11
SI11 input timing
*
CKS111
CKS110
0
0
f
/2 (5 MHz)
X
0
1
f
/2
X
1
0
f
/2
X
1
1
f
/2
X
0
0
f
/2
X
0
1
f
/2
X
1
0
f
/2
X
1
1
External clock input to SCK11
User's Manual U15947EJ2V0UD
4
3
DAP11
CKS112
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
CSI11 serial clock selection
2
(2.5 MHz)
3
(1.25 MHz)
4
(625 kHz)
5
(312.5 kHz)
6
(156.25 kHz)
7
(78.13 kHz)
2
1
0
CKS111
CKS110
Type
1
2
3
4
Mode
Master mode
Master mode
Master mode
Master mode
Master mode
Master mode
Master mode
Slave mode
365

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