NEC 78K0 User Manual page 434

(1) Interrupt request flag registers (IF0L, IF0H, IF1L, IF1H)
The interrupt request flags are set to 1 when the corresponding interrupt request is generated or an instruction is
executed. They are cleared to 0 when an instruction is executed upon acknowledgment of an interrupt request or
upon RESET input.
When an interrupt is acknowledged, the interrupt request flag is automatically cleared and then the interrupt
routine is entered.
IF0L, IF0H, IF1L, and IF1H are set by a 1-bit or 8-bit memory manipulation instruction. When IF0L and IF0H, and
IF1L and IF1H are combined to form 16-bit registers IF0 and IF1, they are set by a 16-bit memory manipulation
instruction.
RESET input clears these registers to 00H.
Figure 19-2. Format of Interrupt Request Flag Registers (IF0L, IF0H, IF1L, IF1H)
Address: FFE0H After reset: 00H R/W
Symbol <7>
IF0L SREIF6
Address: FFE1H After reset: 00H
Symbol <7>
IF0H TMIF010
Address: FFE2H After reset: 00H
Symbol <7>
IF1L PIF7
Address: FFE3H After reset: 00H
Symbol 7
Note 1
IF1H 0
XXIFX
0
1
Notes 1. Be sure to clear bits 5 to 7 of IF1H to 0.
µ
2. PD780146, 780148, and 78F0148 only. Be sure to clear these bits to 0 in the
780144.
Cautions 1. When operating a timer, serial interface, or A/D converter after standby release, operate it
once after clearing the interrupt request flag. An interrupt request flag may be set by noise.
2. If an interrupt request corresponding to a flag of the interrupt request flag register is
generated while the interrupt request flag register is being manipulated (including by 1-bit
memory manipulation), the flag corresponding to the interrupt request may not be set to 1.
434
CHAPTER 19 INTERRUPT FUNCTIONS
<6> <5>
PIF5 PIF4
R/W
<6> <5>
TMIF000 TMIF50 TMIFH0
R/W
<6> <5>
PIF6 WTIF
R/W
6 5
Note 1 Note 1
0 0 ACSIIF
No interrupt request signal is generated
Interrupt request is generated, interrupt request status
User's Manual U15947EJ2V0UD
<4> <3> <2>
PIF3 PIF2 PIF1
<4> <3> <2>
TMIFH1 DUALIF0
<4> <3> <2>
*
KRIF TMIF51 WTIIF
<4> <3> <2>
Note 2
TMIF011 TMIF001
Interrupt request flag
<1> <0>
PIF0 LVIIF
<1> <0>
STIF6 SRIF6
<1> <0>
SRIF0 ADIF
<1> <0>
Note 2 Note 2
CSIIF11 DMUIF
µ
PD780143 and