WR
PU
RD
WR
PORT
Output latch
WR
PM
Note Available only in the
PU0:
Pull-up resistor option register 0
PM0: Port mode register 0
RD:
Read signal
WR××: Write signal
CHAPTER 4 PORT FUNCTIONS
Figure 4-4. Block Diagram of P02
PU0
PU02
(P02)
PM0
PM02
Alternate
function
*
µ
PD780146, 780148, and 78F0148.
User's Manual U15947EJ2V0UD
EV
DD
P-ch
Note
P02/SO11
101