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9.5.2 Cyclic transmission area device (U3En\G )
(1) Definition
The cyclic transmission area device is used to access the CPU shared memory of each CPU module in a multiple
CPU system.
(2) Features
• The transfer speed is higher than the case of using the write (S.TO or TO) or read (FROM) instruction to the
CPU shared memory, resulting in reduced programing steps.
• Using the cyclic transmission area device allows bit manipulation.
• By setting device comments for the cyclic transmission area device, program readability is increased.
• Because information on the CPU shared memory can be directly specified as an argument of the instruction,
no interlock device is required.
(3) Specification method
Specify the I/O number of the CPU module and the CPU shared memory address.
Specification method:U3En\G
Remark
For details of the cyclic transmission area device, refer to the following.
QCPU Userís Manual (Multiple CPU System)
CPU shared memory (setting range: 0 to 4096, 10000 to 24335 in decimal)
Starting I/O number of the CPU module
Setting: First 3 digits of starting I/O number
CPU module mounting location:
* CPU slot (CPU No.1): 3E00
* Slot 0 (CPU No.2): 3E10
H
* Slot 1 (CPU No.3): 3E20
H
* Slot 2 (CPU No.4): 3E30
H
Figure 9.57 Specification method
3E0
H
3E1
3E2
3E3
CHAPTER9 DEVICES
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