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(2) System information
Number
Name
Meaning
Status of CPU
SD200
Status of switch
switch
Status of
SD201
LED status
CPU-LED
Table12.20 Special register
Explanation
• The CPU switch status is stored in the following format:
to
to
b15
b12 b11
b8 b7
3)
Empty
0: RUN
1): CPU switch status
1: STOP
2: L.CLR
2): Memory card
Always OFF
switch
b8 through b12 correspond to
SW1 through SW5 of system
3): DIP switch
setting switch 1.
0: OFF, 1: ON.
b13 through b15 are empty.
• The CPU switch status is stored in the following format:
to
b15
b8 b7
Empty
1):
CPU switch status
0: RUN
1: STOP
2):
Memory card switch
Always OFF
• The CPU switch status is stored in the following format:
to
b15
b8 b7
Empty
1):
CPU switch status
0: RUN
1: STOP
2):
Memory card switch
Always OFF
• The following bit patterns store the status of the LEDs on the CPU
module:
• 0 is off, 1 is on, and 2 is flicker.
b15
to
b12b11
to
b8 b7
8)
7)
6)
5)
4)
1): RUN
5): BOOT
2): ERR.
6): Empty
Mode bit pattern
3): USER
7): Empty
0: OFF 1: Green
4): BAT.
8): MODE
2: Orange
(The Basic model QCPU does not include 3) to 8).)
• The following bit patterns store the status of the LEDs on the CPU
module:
• 0 is off, 1 is on, and 2 is flicker.
to
to
b15
b12b11
b8 b7
8)
7)
6)
5)
4)
1): RUN
5): BOOT
2): ERROR
6): Empty
3): USER
7): Empty
4): BAT.
8): MODE
(The Q00UJCPU, Q00UCPU, and Q01UCPU do not include 5).)
CHAPTER12 PECIAL RELAY LIST AND SPECIAL REGISTER LIST
Set by
(When Set)
to
to
b4 b3
b0
2)
1)
S (Every END
processing)
to
to
b4 b3
b0
2)
1)
S (Every END
processing)
to
to
b4 b3
b0
S (when RUN/
2)
1)
STOP/RESET
switch changed)
to
b4 b3
to
b0
S (Status
3)
2)
1)
change)
to
to
b4 b3
b0
S (Status
3)
2)
1)
change)
Corres-
ponding
Corresponding
ACPU
CPU
D9
Qn(H)
New
QnPH
QnPRH
New
Q00J/Q00/Q01
New
QnU
Q00J/Q00/Q01
Qn(H)
New
QnPH
QnPRH
New
QnU
12 - 40
1
2
3
12
6
7
8
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