Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 461

Register name Address Bit
High-speed 004823A DF
DMA Ch.1 (HW) DE
high-order
destination
address set-up
register DD
DC
Note:
D) Dual address
mode
S) Single
DB
address
DA
mode
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
High-speed 004823C DF–1
DMA Ch.1 (HW)
enable register D0
High-speed 004823E DF–1
DMA Ch.1 (HW)
trigger flag D0
register
High-speed 0048240 DF
DMA Ch.2 (HW) DE
transfer DD
counter DC
register DB
DA
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
High-speed 0048242 DF
DMA Ch.2 (HW) DE
control register
DD–8
Note:
D7
D) Dual address
D6
mode
D5
S) Single
D4
address
D3
mode
D2
D1
D0
S1C33L03 FUNCTION PART
Name Function
D1MOD1 Ch.1 transfer mode
D1MOD0
D1IN1 D) Ch.1 destination address
D1IN0 control
S) Invalid
D1ADRH11 D) Ch.1 destination
D1ADRH10 address[27:16]
D1ADRH9 S) Invalid
D1ADRH8
D1ADRH7
D1ADRH6
D1ADRH5
D1ADRH4
D1ADRH3
D1ADRH2
D1ADRH1
D1ADRH0
– reserved
HS1_EN Ch.1 enable
– reserved
HS1_TF Ch.1 trigger flag clear (writing)
Ch.1 trigger flag status (reading)
TC2_L7 Ch.2 transfer counter[7:0]
TC2_L6 (block transfer mode)
TC2_L5
TC2_L4 Ch.2 transfer counter[15:8]
TC2_L3 (single/successive transfer mode)
TC2_L2
TC2_L1
TC2_L0
BLKLEN27 Ch.2 block length
BLKLEN26 (block transfer mode)
BLKLEN25
BLKLEN24 Ch.2 transfer counter[7:0]
BLKLEN23 (single/successive transfer mode)
BLKLEN22
BLKLEN21
BLKLEN20
DUALM2 Ch.2 address mode selection
D2DIR D) Invalid
S) Ch.2 transfer direction control
– reserved
TC2_H7 Ch.2 transfer counter[15:8]
TC2_H6 (block transfer mode)
TC2_H5
TC2_H4 Ch.2 transfer counter[23:16]
TC2_H3 (single/successive transfer mode)
TC2_H2
TC2_H1
TC2_H0
EPSON
V DMA BLOCK: HSDMA (High-Speed DMA)
Setting Init. R/W
D1MOD[1:0] Mode 0
1 1 Invalid 0
1 0 Block
0 1 Successive
0 0 Single
D1IN[1:0] Inc/dec 0
1 1 Inc.(no init) 0
1 0 Inc.(init)
0 1 Dec.(no init)
0 0 Fixed
X
X
X
X
X
X
X
X
X
X
X
X
– –
1 Enable 0 Disable 0
– –
1 Clear 0 No operation 0
1 Set 0 Cleared
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1 Dual addr 0 Single addr 0
– –
1 Memory WR 0 Memory RD 0
– –
X
X
X
X
X
X
X
X
A-1
Remarks
R/W
R/W
R/W
– Undefined in read.
R/W
– Undefined in read.
R/W
R/W
R/W
R/W
–
R/W
– Undefined in read.
R/W
B-V
HSDMA
B-V-2-23