I/O Memory Of Clock Timer - Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual

Cmos 32-bit single chip microcomputer
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I/O Memory of Clock Timer

Table 7.5 shows the control bits of the clock timer.
Register name
Address
Bit
Clock timer
0040151
D7–2
Run/Stop
(B)
D1
register
D0
Clock timer
0040152
D7
interrupt
(B)
D6
control register
D5
D4
D3
D2
D1
D0
Clock timer
0040153
D7
divider register
(B)
D6
D5
D4
D3
D2
D1
D0
Clock timer
0040154
D7–6
second
(B)
D5
register
D4
D3
D2
D1
D0
Clock timer
0040155
D7–6
minute register
(B)
D5
D4
D3
D2
D1
D0
Clock timer
0040156
D7–5
hour register
(B)
D4
D3
D2
D1
D0
Clock timer
0040157
D7
day (low-order)
(B)
D6
register
D5
D4
D3
D2
D1
D0
Clock timer
0040158
D7
day (high-
(B)
D6
order) register
D5
D4
D3
D2
D1
D0
S1C33L03 FUNCTION PART
Table 7.5 Control Bits of Clock Timer
Name
Function
reserved
TCRST
Clock timer reset
TCRUN
Clock timer Run/Stop control
TCISE2
Clock timer interrupt factor
TCISE1
selection
TCISE0
TCASE2
Clock timer alarm factor selection
TCASE1
TCASE0
TCIF
Interrupt factor generation flag
TCAF
Alarm factor generation flag
TCD7
Clock timer data 1 Hz
TCD6
Clock timer data 2 Hz
TCD5
Clock timer data 4 Hz
TCD4
Clock timer data 8 Hz
TCD3
Clock timer data 16 Hz
TCD2
Clock timer data 32 Hz
TCD1
Clock timer data 64 Hz
TCD0
Clock timer data 128 Hz
reserved
TCMD5
Clock timer second counter data
TCMD4
TCMD5 = MSB
TCMD3
TCMD0 = LSB
TCMD2
TCMD1
TCMD0
reserved
TCHD5
Clock timer minute counter data
TCHD4
TCHD5 = MSB
TCHD3
TCHD0 = LSB
TCHD2
TCHD1
TCHD0
reserved
TCDD4
Clock timer hour counter data
TCDD3
TCDD4 = MSB
TCDD2
TCDD0 = LSB
TCDD1
TCDD0
TCND7
Clock timer day counter data
TCND6
(low-order 8 bits)
TCND5
TCND0 = LSB
TCND4
TCND3
TCND2
TCND1
TCND0
TCND15
Clock timer day counter data
TCND14
(high-order 8 bits)
TCND13
TCND15 = MSB
TCND12
TCND11
TCND10
TCND9
TCND8
EPSON
III PERIPHERAL BLOCK: CLOCK TIMER
Setting
Init. R/W
1 Reset
0 Invalid
X
1 Run
0 Stop
X
TCISE[2:0]
Interrupt factor
X
1
1
1
None
X
1
1
0
Day
X
1
0
1
Hour
1
0
0
Minute
0
1
1
1 Hz
0
1
0
2 Hz
0
0
1
8 Hz
0
0
0
32 Hz
TCASE[2:0]
Alarm factor
X
1
X
X
Day
X
X
1
X
Hour
X
X
X
1
Minute
0
0
0
None
1 Generated
0 Not generated
X
1 Generated
0 Not generated
X
1 High
0 Low
X
1 High
0 Low
X
1 High
0 Low
X
1 High
0 Low
X
1 High
0 Low
X
1 High
0 Low
X
1 High
0 Low
X
1 High
0 Low
X
0 to 59 seconds
X
X
X
X
X
X
0 to 59 minutes
X
X
X
X
X
X
0 to 23 hours
X
X
X
X
X
0 to 65535 days
X
(low-order 8 bits)
X
X
X
X
X
X
X
0 to 65535 days
X
(high-order 8 bits)
X
X
X
X
X
X
X
A-1
Remarks
0 when being read.
W
0 when being read.
R/W
R/W
R/W
R/W
Reset by writing 1.
R/W
Reset by writing 1.
R
R
R
R
R
R
R
R
0 when being read.
R
B-III
0 when being read.
R/W
CTM
0 when being read.
R/W
R/W
R/W
B-III-7-7

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