Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 476

Cmos 32-bit single chip microcomputer
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V DMA BLOCK: IDMA (Intelligent DMA)
The contents of control information (3 words) in each channel are shown in the table below.
Word
Bit
1st
D31
LNKEN
D30–24
LNKCHN[6:0] IDMA link field
D23–8
TC[15:0]
D7–0
BLKLEN[7:0] Block size (block transfer mode)
2nd
D31
DINTEN
D30
DATSIZ
D29–28
SRINC[1:0]
D27–0
SRADR[27:0] Source address
3rd
D31–30
DMOD[1:0]
D29–28
DSINC[1:0]
D27–0
DSADR[27:0] Destination address
LNKEN: IDMA link enable (D31/1st Word)
If this bit remains set (= "1"), the IDMA channel that is set in the IDMA link field is invoked after the
completion of a DMA transfer in this channel. DMA transfers in multiple channels can be performed
successively by merely triggering the first channel to be executed. There is no limit to the number of channels
linked. Set this link in order of the IDMA channels you want to be executed.
If this bit is "0", IDMA is completed by merely executing a DMA transfer in this channel.
LNKCHN[6:0]: IDMA link field (D[30:24]/1st Word)
If you want IDMA to be linked, set the channel numbers (0 to 127) to be executed next.
The data in this field is valid only when LINKEN = "1".
TC[15:0]: Transfer counter (D[23:8]/1st Word)
In block transfer mode, a transfer count can be specified using up to 16 bits. Set this value here. In single
transfer and successive transfer modes, a transfer count can be specified using up to 24 bits. Set a 16-bit high-
order value here.
B-V-3-2
Table 3.1 IDMA Control Information
Name
IDMA link enable
Transfer counter (block transfer mode)
Transfer counter - high-order 16 bits (single or successive transfer mode)
Transfer counter - low-order 8 bits (single or successive transfer mode)
End-of-transfer interrupt enable
Data size control
Source address control
SRINC1 SRINC0
1
1
1
0
0
1
0
0
Transfer mode (Do not set to "11".)
DMOD1 DMOD0
1
0
0
1
0
0
Destination address control
DSINC1 DSINC0
1
1
1
0
0
1
0
0
Function
"1" = Enabled, "0" = Disabled
"1" = Enabled, "0" = Disabled
"1" = Half-word, "0" = Byte
Setting contents
Address incremented
(In block transfer mode, the transfer address is
updated without reset using the initial value.)
Address incremented
(In block transfer mode, the transfer address is
updated with the initial value.)
Address decremented
(In block transfer mode, the transfer address is
updated without reset using the initial value.)
Address fixed
Setting contents
Block transfer mode
Successive transfer mode
Single transfer mode
Setting contents
Address incremented
(In block transfer mode, the transfer address is
updated without reset using the initial value.)
Address incremented
(In block transfer mode, the transfer address is
updated with the initial value.)
Address decremented
(In block transfer mode, the transfer address is
updated without reset using the initial value.)
Address fixed
EPSON
S1C33L03 FUNCTION PART

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