Block Diagram - Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual

1.2 Block Diagram

V
DD
V
SS
V
DDE
A[23:0]
D[15:0]
#RD
#WRL/#WR/#WE
#WRH/#BSH
#HCAS, #LCAS, #RAS[1:0]
#CE10EX, #CE[9:3]
#EMEMRD
#WAIT(P30)
#DRD(P20), #DWE/#SDWE(P21)
#GAAS(P21), #GARD(P31)
#SDCE[1:0]
#SDCAS, #SDRAS
SDA10, SDCKE, HDQM, LDQM
OSC3
OSC4
PLLS[1:0]
PLLC
OSC1
OSC2
FOSC1(P14)
#DMAREQx(K50, K51, K53, K54)
#DMAACKx(P32, P33, P04, P06)
#DMAENDx(P15, P16, P05, P07)
P00–07
P10–16
P20–27
P30–35
S1C33L03 PRODUCT PART
S1C33L03
S1C33000
CPU Core
Bus Control Unit
SDRAM Controller
OSC3/PLL
Prescaler
OSC1
Clock
Timer
Intelligent
DMA (128 ch.)
High-speed
DMA (4 ch.)
RAM
8KB
I/O Port
Figure 1.2.1 S1C33L03 Block Diagram
EPSON
#RESET
#NMI
#X2SPD
ICEMD
DSIO
EA10MD[1:0]
BCLK
#BUSREQ(P34)
#BUSACK(P35)
#BUSGET(P31)
DST[2:0](P10–12)
DPCO(P13)
DCLK(P14)
Interrupt
Controller
16-bit
EXCLx(P10–13, P15, P16)
Programmable
TMx(P22–27)
Timer (6 ch.)
8-bit
Programmable
T8UFx(P10–13)
Timer (6 ch.)
SINx(P00, P04, P27, P33)
Serial Interface
SOUTx(P01, P05, P26, P16)
(4 ch.) #SCLKx(P02, P06, P25, P15)
#SRDYx(P03, P07, P24, P32)
AD0–7(K60–67)
A/D Converter
#ADTRG(K52)
(8 ch.)
AV
DDE
FPDAT[7:4]
FPDAT[3:0]/GPO[6:3]
FPFRAME
LCD Controller
FPLINE
FPSHIFT
DRDY(MOD/FPSHIFT2)
LCDPWR
K50–54
Input Port
K60–67
1 OUTLINE
A-1
A-3