1: Introduction
A block diagram of the ARM720T processor is shown in Figure 1-1.
Data and
address
buf f ers
interf ace
A MBA A HB
bus interf ace
1-2
V irtual address bus
MMU
8KB cache
Internal data bus
Control and
clocking logic
A MBA
Figure 1-1 720T Block diagram
A RM720T core
System control
coprocessor
A RM720T
EPSON
JTA G debug
interf ace
ETM interf ace
Coprocessor
interf ace
ARM720T CORE CPU MANUAL