CONTENTS
6.9
Reset ....................................................................................................... 6-13
7
7.1
About the MMU.......................................................................................... 7-1
7.2
7.3
Address translation .................................................................................... 7-4
7.4
7.5
7.6
7.7
7.8
External aborts......................................................................................... 7-21
7.9
8
8.1
About coprocessors ................................................................................... 8-1
8.2
8.3
8.4
8.5
8.6
8.7
STC operations........................................................................................ 8-10
8.8
8.9
9
9.1
9.2
Controlling debugging................................................................................ 9-3
9.3
9.4
Debug interface ......................................................................................... 9-9
9.5
9.6
9.7
9.8
9.9
9.10
9.11
9.12
The TAP controller................................................................................... 9-19
9.13
9.14
Test data registers ................................................................................... 9-22
9.15
Scan timing .............................................................................................. 9-25
9.16
9.17
Exit from debug state............................................................................... 9-29
9.18
9.19
9.20
9.21
9.22
9.23
Abort status register................................................................................. 9-38
9.24
9.25
Debug status register............................................................................... 9-41
9.26
9.27
ii
EPSON
ARM720T CORE CPU MANUAL