Examining The Core And The System In Debug State - Epson ARM720T Core Cpu Manual

9: Debugging Your System
9.16

Examining the core and the system in debug state

When the ARM720T processor is in debug state, you can examine the core and system state
by forcing the load and store multiples into the instruction pipeline.
Before you can examine the core and system state, the debugger must determine whether the
processor entered debug state from Thumb state or ARM state, by examining bit 4 of the
EmbeddedICE-RT debug status register, as follows:
Bit 4 HIGH
Bit 4 LOW
9-26
Table 9-6 Scan chain 1 cells (continued)
Number Signal
15 DATA[14]
16 DATA[15]
17 DATA[16]
18 DATA[17]
19 DATA[18]
20 DATA[19]
21 DATA[20]
22 DATA[21]
23 DATA[22]
24 DATA[23]
25 DATA[24]
26 DATA[25]
27 DATA[26]
28 DATA[27]
29 DATA[28]
30 DATA[29]
31 DATA[30]
32 DATA[31]
33 DBGBREAK
The core has entered debug from Thumb state.
The core has entered debug from ARM state.
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ARM720T CORE CPU MANUAL