Table 7-11 Interpreting Access Permission (Ap) Bits - Epson ARM720T Core Cpu Manual

7: Memory Management Unit
Table 7-10 shows how to interpret the
interpretation is dependent on the S and R bits (control register bits 8 and 9).
AP S R
b00 0 0
b00 1 0
b00 0 1
b00 1 1
b01 x x
b10 x x
b11 x x
bxx 1 1
a. Do not use this encoding. [S:R] = b11 generates a fault for any access.
7-18
Access Permission

Table 7-11 Interpreting access permission (AP) bits

Supervisor
User permissions
permissions
No access No access
Read-only No access
Read-only Read-only
Reserved -
Read/write No access
Read/write Read-only
Read/write Read/write
Reserved -
(AP) bits and how their
Description
Any access generates a
permission fault
Only Supervisor read
permitted
Any write generates a
permission fault
a
-
Access allowed only in
Supervisor mode
Writes in User mode cause
permission fault
All access types permitted in
both modes
a
-
EPSON ARM720T CORE CPU MANUAL