6: The Bus Interface
Figure 6-4 shows some examples of different transfer types.
HCLK
HTRANS[1:0]
HADDR[31:0]
HBURST[2:0]
HWDATA[31:0]
HREADY
HRDATA[31:0]
In Figure 6-4:
•
The first transfer is the start of a burst and is therefore nonsequential.
•
The master performs the second transfer of the burst immediately.
•
The master performs the third transfer of the burst immediately, but this time the
slave is unable to complete and uses HREADY to insert a single wait state.
•
The final transfer of the burst completes with zero wait states.
6-6
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Figure 6-4 Transfer type examples
EPSON
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ARM720T CORE CPU MANUAL
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