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Glossary
This glossary describes some of the terms used in this manual. Where terms can have several
meanings, the meaning presented here is intended.
Is caused by an illegal memory access. Abort can be caused by the external
Abort
memory system, an external MMU, or the EmbeddedICE-RT logic.
Addressing modes
A procedure shared by many different instructions, for generating values
used by the instructions. For four of the ARM addressing modes, the values
generated are memory addresses (which is the traditional role of an
addressing mode). A fifth addressing mode generates values to be used as
operands by data-processing instructions.
Arithmetic Logic Unit
The part of a computer that performs all arithmetic computations, such as
addition and multiplication, and all comparison operations.
See
ALU
A processor that is executing ARM (32-bit) instructions is operating in
ARM state
ARM state.
Memory organization where the least significant byte of a word is at a
Big-endian
higher address than the most significant byte.
Banked registers
Register numbers whose physical register is defined by the current
processor mode. The banked registers are registers r8 to r14, or r13 to r14,
depending on the processor mode.
A location in the program. If execution reaches this location, the debugger
Breakpoint
halts execution of the code image.
See also
See
CISC
ARM720T CORE CPU MANUAL
Arithmetic Logic Unit.
Watchpoint.
Complex Instruction Set Computer.
EPSON
Glossary
Glossary-1
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