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DTCER—DTC Enable Register A
DTCER—DTC Enable Register B
DTCER—DTC Enable Register C
DTCER—DTC Enable Register D
DTCER—DTC Enable Register E
DTCER—DTC Enable Register F
DTCER—DTC Enable Register G
DTCER—DTC Enable Register I
Bit
7
DTCE7
Initial value
0
Read/Write
R/W
DTC Activation Enable
0
1
6
5
DTCE6
DTCE5
0
0
R/W
R/W
DTC activation by interrupt is disabled
[Clearing conditions]
• When the DISEL bit is 1 and the data transfer has ended
• When the specified number of transfers have ended
DTC activation by interrupt is enabled
[Holding condition]
When the DISEL bit is 0 and the specified number of transfers
have not ended
H'FE16
H'FE17
H'FE18
H'FE19
H'FE1A
H'FE1B
H'FE1C
H'FE1E
4
3
DTCE4
DTCE3
DTCE2
0
0
R/W
R/W
2
1
DTCE1
DTCE0
0
0
R/W
R/W
R/W
DTC
DTC
DTC
DTC
DTC
DTC
DTC
DTC
0
0
969
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