Section 19 Ram; Overview; Block Diagram - Hitachi H8S/2646 Hardware Manual

Hitachi 16-bit single-chip microcomputer h8s/2646 series
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19.1

Overview

The H8S/2646, H8S/2646R, H8S/2648, and H8S/2648R have 4 kbytes and H8S/2645 and
H8S/2647 have 2 kbytes of on-chip high-speed static RAM. The RAM is connected to the CPU by
a 16-bit data bus, enabling one-state access by the CPU to both byte data and word data. This
makes it possible to perform fast word data transfer.
The on-chip RAM can be enabled or disabled by means of the RAM enable bit (RAME) in the
system control register (SYSCR).
19.1.1

Block Diagram

Figure 19-1 shows a block diagram of the on-chip RAM.
Note: * Addresses starting from H'FFE800 in the H8S/2645 and H8S/2647.

Section 19 RAM

Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
H'FFE000*
H'FFE002
H'FFE004
H'FFEFBE
H'FFFFC0
H'FFFFFE
Figure 19-1 Block Diagram of RAM
H'FFE001
H'FFE003
H'FFE005
H'FFEFBF
H'FFFFC1
H'FFFFFF
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