Mailbox Configuration Register (Mbcr) - Hitachi H8S/2646 Hardware Manual

Hitachi 16-bit single-chip microcomputer h8s/2646 series
Table of Contents

Advertisement

15.2.4

Mailbox Configuration Register (MBCR)

The mailbox configuration register (MBCR) is a 16-bit readable/writable register that is used to set
mailbox (buffer) transmission/reception.
MBCR
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bits 15 to 9 and 7 to 0—Mailbox Setting Register: These bits set the polarity of the
corresponding mailboxes.
Bit x: MBCRx
0
1
Bit 8—Reserved: This bit always reads 1. The write value should always be 1.
540
15
14
MBCR7
MBCR6
MBCR5
0
0
R/W
R/W
7
6
MBCR15 MBCR14 MBCR13 MBCR12 MBCR11 MBCR10
0
0
R/W
R/W
Description
Corresponding mailbox is set for transmission
Corresponding mailbox is set for reception
13
12
11
MBCR4
MBCR3
0
0
R/W
R/W
R/W
5
4
0
0
R/W
R/W
R/W
10
9
MBCR2
MBCR1
0
0
0
R/W
R/W
3
2
1
MBCR9
0
0
0
R/W
R/W
8
1
0
MBCR8
0
R/W
(Initial value)
(x = 15 to 0)

Advertisement

Table of Contents
loading

Table of Contents