Table 8-4
Interrupt Sources, DTC Vector Addresses, and Corresponding DTCEs
Interrupt Source
Write to DTVECR
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
Reserved
ADI (A/D conversion end)
Reserved
TGI0A (GR0A compare match/
input capture)
TGI0B (GR0B compare match/
input capture)
TGI0C (GR0C compare match/
input capture)
TGI0D (GR0D compare match/
input capture)
Reserved
TGI1A (GR1A compare match/
input capture)
TGI1B (GR1B compare match/
input capture)
TGI2A (GR2A compare match/
input capture)
TGI2B (GR2B compare match/
input capture)
196
Origin of
Interrupt
Vector
Source
Number
Software
DTVECR
External pin
16
17
18
19
20
21
—
22 to 27
A/D
28
—
29 to 31
TPU
32
channel 0
33
34
35
—
36 to 39
TPU
40
channel 1
41
TPU
44
channel 2
45
Vector
*1
Address
DTCE
H'0400+
—
(DTVECR
[6:0]
<<1)
H'0420
DTCEA7
H'0422
DTCEA6
H'0424
DTCEA5
H'0426
DTCEA4
H'0428
DTCEA3
H'042A
DTCEA2
H'042C to
—
H'0436
H'0438
DTCEB6
H'043A to
—
H'043E
H'0440
DTCEB5
H'0442
DTCEB4
H'0444
DTCEB3
H'0446
DTCEB2
H'0448 to
—
H'044E
H'0450
DTCEB1
H'0452
DTCEB0
H'0458
DTCEC7
H'045A
DTCEC6
Priority
High
Low