Hitachi H8S/2646 Hardware Manual page 267

Pin Selection Method and Pin Functions
P26/TIOCA5 Switches as follows according to the combinations of the TPU channel 5
setting made using bits MD3 to MD0 of TMDR5, bits IOA3 to IOA0 of TIOR5,
and bits CCLR1 and CCLR0 of TCR5, as well as the P26DDR bit.
TPU Channel
5 Setting
P26DDR
Pin function
TPU Channel
5 Setting
MD3 to MD0
IOA3 to IOA0
CCLR1,
CCLR0
Output
function
Note: * TIOCB5 output prohibited.
Table Below (1)
—
TIOCA5 output
(2) (1)
B'0000, B'01xx
B'0000 B'0001 to
B'0011
B'0100
B'0101 to
B'1xxx
B'0111
— —
— Output
compare
output
Table Below (2)
0
P26 input *
TIOCA5 input *
(2) (1)
B'001x B'0010
B'xx00 Other than B'xx00
— —
than B'01
— PWM
mode 1 mode 2
output *
1
P26 output
(1) (2)
B'0011
Other B'01
PWM —
output
235