On-Chip Hcan Module Access Timing - Hitachi H8S/2646 Hardware Manual

2.9.4

On-Chip HCAN Module Access Timing

On-chip HCAN module access is performed in four states. The data bus width is 16 bits. Wait
states can be inserted by means of a wait request from the HCAN. On-chip HCAN module access
cycle is shown in figures 2-21 and 2-22, and the pin states in figure 2-23.
ø
Internal address bus
HCAN read signal
Read
Internal data bus
HCAN write signal
Write
Internal data bus
Figure 2-21 On-Chip HCAN Module Access Cycle (No Wait State)
ø
Internal address bus
HCAN read signal
Read
Internal data bus
HCAN write signal
Write
Internal data bus
Figure 2-22 On-Chip HCAN Module Access Cycle (Wait States Inserted)
T2
T1
T2
T1 T3
Bus cycle
T3
T4
Address
Read data
Write data
Bus cycle
Tw Tw
Address
Write data
T4
Read data
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