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Clearing the IRR0 bit of the Interrupt Register (IRR): The reset interrupt flag (IRR0) is
always set after a reset or recovery from software standby mode. A HCAN interrupt is
immediately entered if interrupts are enabled, so the IRR0 must be cleared.
Bit Rate and Bit Timing Settings: As bit rate settings, a baud rate setting and bit timing setting
must be made each time a CAN node begins communication. The baud rate and bit timing settings
are made in the bit configuration register (BCR).
Note: BCR can be written to at all times, but should only be modified in configuration mode.
Settings should be made so that all CAN controllers connected to the CAN bus have the
same baud rate and bit width.
Refer to table 15.3 for the range of values that can be used as settings (TSEG1, TSEG2,
BRP, sample point, and SJW) for BCR.
Table 15-3 BCR Register Value Setting Ranges
Name
Time segment 1
Time segment 2
Baud rate prescaler
Sample point
Re-synchronization jump width
Value Setting Ranges
• The value of SJW is stipulated in the CAN specifications.
3 ≥ SJW ≥ 0
• The minimum value of TSEG1 is stipulated in the CAN specifications.
TSEG1 > TSEG2
• The minimum value of TSEG2 is stipulated in the CAN specifications.
TSEG2 ≥ SJW
The following formula is used to calculate the baud rate.
Bit rate =
2 × (BRP + 1) × (3 + TSEG1 + TSEG2)
= φ (system clock)
Note: f
CLK
The BCR value is used in the BRP, TSEG1, and TSEG2.
Min.
Abbreviation
Value
TSEG1
B'0011
TSEG2
B'001
BRP
B'000000 B'111111
SAM
B'0
SJW
B'00
f
CLK
Max.
Value
B'1111
B'111
B'1
B'11
565
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