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LSL, LSR
Operation:
Assembler
Syntax:
Attributes:
Description:
carry bit receives the last bit shifted out of the operand.
Shift count can be specified in one of two ways:
1. Immediate — The shift count (1–8) is specified by the instruction.
2. Register — The shift count is the value in the data register specified by the
instruction, modulo 64.
The size of the operation for register destinations may be specified as byte, word, or
long. The contents of memory, 〈ea〉, can be shifted one bit only, and the operand size
is restricted to a word.
The LSL instruction shifts the operand to the left the number of positions specified as
the shift count. Bits shifted out of the high-order bit go to both the carry and the extend
bits; zeros are shifted into the low-order bits.
The LSR instruction shifts the operand to the right the number of positions specified
as the shift count. Bits shifted out of the low-order bit go to both the carry and the ex-
tend bits; zeros are shifted into the high-order bits.
MOTOROLA
4-86
Logical Shift
Destination Shifted by 〈count〉 → Destination
LSd Dx, Dy
LSd #〈data〉, Dy
LSd 〈ea〉
where d is direction, L or R
Size = (Byte, Word, Long)
Shifts the bits of the operand in the direction specified (L or R). The
LSL
0
LSR
INSTRUCTION SET
X/C
LSL, LSR
0
X/C
CPU32
REFERENCE MANUAL
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