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CHK
Operation:
Assembler
Syntax:
Attributes:
Description:
to zero and to the upper bound (effective address operand). The upper bound is a
twos complement integer. If the register value is less than zero or greater than the
upper bound, a CHK instruction exception, vector number 6, occurs.
Condition Codes:
X
N
Z
—
*
U
X
Not affected.
N
Set if Dn < 0; cleared if Dn > effective address operand. Undefined otherwise.
Z
Undefined.
V
Undefined.
C
Undefined.
Instruction Format:
15
14
13
0
1
0
Instruction Fields:
Register field — Specifies the data register that contains the value to be checked.
Size field — Specifies the size of the operation.
11 — Word operation.
10 — Long operation.
Effective Address field — Specifies the upper bound operand. Only data addressing
modes areallowed as shown:
CPU32
REFERENCE MANUAL
Check Register Against Bounds
If Dn < 0 or Dn > Source then TRAP
CHK 〈ea〉, Dn
Size = (Word, Long)
Compares the value in the data register specified by the instruction
V
C
U
U
12
11
10
9
0
REGISTER
INSTRUCTION SET
8
7
6
5
SIZE
0
CHK
4
3
2
1
EFFECTIVE ADDRESS
MODE
REGISTER
MOTOROLA
0
4-49
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