Motorola CPU32 Reference Manual page 72

Hide thumbs Also See for CPU32:
Table of Contents

Advertisement

ADDX
Operation:
Assembler
Syntax:
Attributes:
Description:
extend bit and stores the result in the destination location. The operands can be
addressed in two ways:
1. Data register to data register: Data registers specified by the instruction contain
the operands.
2. Memory to memory: Address registers specified by the instruction address the
operands using the predecrement addressing mode.
Condition Codes:
X
N
Z
*
*
*
X
Set the same as the carry bit.
N
Set if the result is negative. Cleared otherwise.
Z
Cleared if the result is nonzero. Unchanged otherwise.
V
Set if an overflow occurs. Cleared otherwise.
C
Set if a carry is generated. Cleared otherwise.
Normally the Z condition code bit is set via programming before the
start of an operation. This allows successful tests for zero results
upon completion of multiple-precision operations.
Instruction Format:
15
14
13
1
1
0
MOTOROLA
4-24
Add Extended
Source + Destination + X → Destination
ADDX Dy, Dx
ADDX – (Ay), – (Ax)
Size = (Byte, Word, Long)
Adds the source operand to the destination operand along with the
V
C
*
*
12
11
10
9
1
REGISTER Rx
INSTRUCTION SET
NOTE
8
7
6
5
1
SIZE
0
ADDX
4
3
2
1
0
R/M
REGISTER Ry
CPU32
REFERENCE MANUAL
0

Advertisement

Table of Contents
loading

Table of Contents