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LSL, LSR
Instruction Format (Memory Shifts):
15
14
13
1
1
1
Instruction Fields (Memory Shifts):
dr field — Specifies the direction of the shift:
0 — Shift right
1 — Shift left
Effective Address field — Specifies the operand to be shifted.
Only memory alterable addressing modes are allowed as shown:
Addressing Mode
Dn
An
(An)
(An) +
– (An)
(d
, An)
16
(d
, An, Xn)
8
(bd, An, Xn)
MOTOROLA
4-88
Logical Shift
12
11
10
9
0
0
0
1
Mode
Register
—
—
—
—
010
Reg. number: An
011
Reg. number: An
100
Reg. number: An
101
Reg. number: An
110
Reg. number: An
110
Reg. number: An
INSTRUCTION SET
8
7
6
5
dr
1
1
Addressing Mode
(xxx).W
(xxx).L
#〈data〉
(d
, PC)
16
(d
, PC, Xn)
8
(bd, PC, Xn)
LSL, LSR
4
3
2
1
EFFECTIVE ADDRESS
MODE
REGISTER
Mode
Register
111
000
111
001
—
—
—
—
—
—
—
—
REFERENCE MANUAL
0
CPU32
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