Architecture Summary; Programming Model - Motorola CPU32 Reference Manual

The CPU32 is upward source and object code compatible with the MC68000 and
MC68010. It is downward source and object code compatible with the MC68020. With-
in the M68000 Family, architectural differences are limited to the supervisory operating
state. User state programs can be executed unchanged on upward compatible devic-
es.
The major CPU32 features are as follows:
• 32-Bit Internal Data Path and Arithmetic Hardware
• 32-Bit Address Bus Supported by 32-Bit Calculations
• Rich Instruction Set
• Eight 32-Bit General-Purpose Data Registers
• Seven 32-Bit General-Purpose Address Registers
• Separate User and Supervisor Stack Pointers
• Separate User and Supervisor State Address Spaces
• Separate Program and Data Address Spaces
• Many Data Types
• Flexible Addressing Modes
• Full Interrupt Processing
• Expansion Capability

2.1 Programming Model

The CPU32 programming model consists of two groups of registers that correspond
to the user and supervisor privilege levels. User programs can only use the registers
of the user model. The supervisor programming model, which supplements the user
programming model, is used by CPU32 system programmers who wish to protect sen-
sitive operating system functions. The supervisor model is identical to that of MC68010
and later processors.
The CPU32 has eight 32-bit data registers, seven 32-bit address registers, a 32-bit
program counter, separate 32-bit supervisor and user stack pointers, a 16-bit status
register, two alternate function code registers, and a 32-bit vector base register (see
Figure 2-1 and Figure 2-2).
CPU32
REFERENCE MANUAL
SECTION 2

ARCHITECTURE SUMMARY

ARCHITECTURE SUMMARY MOTOROLA
2-1