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4.1
PROGRAMMING MODEL
The programmer can view the DSP96002 architecture as three execution units operating in parallel. The
three execution units are the
•
Data ALU
•
Address Generation Unit
•
Program Controller
The DSP96002 instruction set has been designed to allow flexible control of these parallel processing re-
sources. Many instructions allow the programmer to keep each unit busy, thus enhancing program execu-
tion speed. The programming model is shown in Figure 4-1 and Figure 4-2, and is described in the following
sections.
31
PC
31
LA
31
Program Controller* - Reserved bits: always read as zero, should be written with zero for future compatibil-
Figure 4-1. DSP96002 Programming Model - Program Controller
MOTOROLA
SECTION 4
SOFTWARE ARCHITECTURE
0
31
23
MR
IER
0
31
0 31
SYSTEM STACK
(SS)
ity.
DSP96002 USER'S MANUAL
15
0
7
ER
CCR
0
LC
0
1
15
31
7
*
OMR
31
5
*
0
0
SP
4 - 1
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