Motorola DSP96002 User Manual page 396

JSR
Operation:
PC SSH; SR SSL; xx
PC SSH; SR SSL; ea
Description:
The address of the instruction immediately following the JSR instruction and the status register are pushed
onto the stack. Program execution then continues at the effective address in program memory. All mem-
ory alterable addressing modes may be used for the effective address. A fast Short Jump addressing
mode may also be used. The 15-bit data is sign extended to form the effective address. See Section
A.10 for restrictions.
CCR Condition Codes: Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: JSR
31
0000 0011
Instruction Format: JSR
31
0000 0011
Instruction Fields:
ea Rn - R0-R7 (Memory alterable addressing modes only)
Absolute Address - 32 bits
Short Jump Address - aaaaaaaaaaaaaaa (15 bits)
Timing: 4 + jx oscillator clock cycles
Memory: 1 + ea program words
A - 208
Jump to Subroutine
PC
PC
label (short)
11aa aaaa
ea
0100 MMMR
OPTIONAL EFFECTIVE ADDRESS EXTENSION
DSP96002 USER'S MANUAL
Assembler Syntax:
JSR label (short)
JSR ea
14 13
aa 11 1111
14 13
11 1111
JSR
0
1aaa aaaa
0
1000 0000
MOTOROLA