Motorola DSP96002 User Manual page 819

write to
TCR (N) event
TE
Clock
(CLK/2)
TCR
Counter
Interrupt
TIO
Figure 11 - Standard Timer Mode, Internal Clock, Output Pulse Enabled (INV=0)
write to
TCR(N) event
TE
Clock
(CLK/2)
TCR
Counter
Interrupt
TIO
Figure 12 - Standard Timer Mode, Internal Clock, Output Pulse Enabled (INV=1)
two (CLK/2). During the clock cycle following the point where the counter reaches 0, the
MOTOROLA
first
N
N
N-1
first
N
N-1
N
new event
last event
0 N
new event
last event
0 N
N-1
2xCLK
N-1
2xCLK
37