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ADDC
Operation:
D.L (parallel data bus move)
D.L + S.L + C
Description:
Add the low portion of the two specified operands along with the C bit of the condition code register and
store the result in the low portion of destination operand D. When doing multiple precision addition, the
higher precision long words of the input variables must be moved to the low portion of the Dn register.
Input Operand(s) Precision: 32-bit integer.
Output Operand Precision: 32-bit integer.
CCR Condition Codes:
C
- Set if carry is generated from the MSB of the result. Cleared otherwise.
V
- Set if result overflows. Cleared otherwise.
Z
- Cleared if the result is not zero. Unchanged otherwise.
N
- Set if result is negative. Cleared otherwise.
I
- Not affected.
LR - Not affected.
–
R - Not affected.
A
- Not affected.
ER Status Bits:
Not affected.
IER Flags:
Not affected.
Instruction Format: ADDC
31
DATA BUS MOVE FIELD
OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA
Instruction Fields:
D
Dn.L
S
Dn.L
Timing: 2 + mv oscillator clock cycles
Memory: 1 + mv program words
MOTOROLA
Add with Carry
S,D
(move syntax - see the MOVE instruction description.)
(u u)
d d d
n n n
where nnn = 0-7
s s s
n n n
where nnn = 0-7
DSP96002 USER'S MANUAL
Assembler Syntax:
ADDC
S,D
(move syntax - see the MOVE in-
struction description.)
14 13
00
1sss
ADDC
0
uu01
1ddd
A - 21
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