Motorola DSP96002 User Manual page 21

YY
REQUEST_BUS
(Y)
— –
B R = 0
— –
B A = 1
ZY
)
(delayed
ACTIVE_
MASTER
(Z)
— –
B
— –
B
ZZ
(delayed)
Likewise, when executing the read part of a RMW access, the end_of_sequence signal is deasserted.
This signal is used to give up bus ownership if
chine which controls the bus handshake is illustrated in Figure 2.9.
The transition arcs are labeled by two letters which denote its source and destination states. The equa-
tions of the transition arcs are described as follows:
XX = ^ext_acc_req
XY = ext_acc_req
XZ = ext_acc_req
XW = ^ext_acc_req &
YX = ^ext_acc_req
YY = ext_acc_req
YZ = ext_acc_req
YW = ^ext_acc_req &
ZX = ^ext_acc_req
ZY = ext_acc_req
2 - 18
WY
(non-existant)
YZ
XZ
R = 0
A = 0
Figure 2-9. Bus Handshake State Diagram
— – —
& ^( ^ B G & B
— – —
& ^( ^ B G & B
— – —
& ( ^ B G & B
— – —
( ^ B G & B
— – —
& ^( ^ B G & B
— – —
& ^( ^ B G & B
— – —
& ( ^ B G & B
— – —
( ^ B G & B
— –
& B G
— — –
& D B G & end_of_sequence
DSP96002 USER'S MANUAL
YX (illegal)
XY
ZX
YW (illegal)
ZW
WZ
— –
B G is deasserted during bus transfers. The state ma-
–
B )
–
B )
–
B )
–
B )
–
B ) (note 1)
–
B )
–
B )
–
B ) (note 1)
(note 3)
XX
IDLE
(X)
— – — –
B R = R
H
XW
WX
PARKING_
MASTER
(W)
— –
—
B R =
–
R H
WW
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